1. Field of the Invention
The present invention relates to a logic circuit and, more particularly, to a differential input type logic circuit.
2. Description of the Prior Art
A differential input type logic circuit can be operated at a high speed and is widely used. This type logic circuit is basically constructed by a pair of transistors commonly connected at their emitters with a constant current circuit such that one of the transistors has its base supplied with an input signal while the other transistor has its base supplied with a reference voltage. In this instance, a constant voltage, which is generated by a constant current circuit or the like, is used as that reference voltage. In order to ensure a large noise margin, the use of the differential input type logic circuit in which the level of that reference voltage is controlled in accordance with the input signal has recently been begun. In this differential input type logic circuit, moreover, a circuit connection is established between the collector of the transistor having its base supplied with the input signal and the base of the transistor supplied with the reference voltage. In such logic circuit, however, when the input signal is changed, for instance, from a high level to a low level, the transistor supplied with that reference voltage is rendered conductive so that the output from the collector thereof becomes a low level. At this time, the output level from the collector is transiently undershot by the reflection in the circuit and certain wirings or the like so that it is shifted to a level abnormally lower than a specified low level. The abnormal level due to the undershoot is transmitted to the collector of the aforementioned transistor which is supplied with the input signal through the circuit connection, so that the output level which should be high is shifted to the low level in a transient manner thereby to invite the drawback that the logic or derive circuit of the next stage undergoes an erroneous operation.
This drawback is not peculiar to the differential input type logic circuit but is similarly experienced even in case a plurality of gate circuits are driven by the level of the collector of the transistor having its base supplied with the input signal. This is because the abnormal level due to the undershoot in a certain gate circuit is also transmitted to the other gate circuits.